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Alif Semiconductor /AE302F80F55D5AE_CM55_HP_View /AES0 /AES_INTERRUPT

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Interpret as AES_INTERRUPT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)REGS_ERR_RESP 0 (Val_0x0)SPI_ERR_RESP

SPI_ERR_RESP=Val_0x0, REGS_ERR_RESP=Val_0x0

Description

AES Interrupt Control Register

Fields

REGS_ERR_RESP

Register Error Response interrupt enabling. Set when there is an access to an invalid AES register. Write 1 to clear bit.

0 (Val_0x0): Register Error Response interrupt is disabled.

1 (Val_0x1): Register Error Response interrupt is enabled.
SPI_ERR_RESP

SPI Error Response interrupt enabling. Set when an error response is received from the OSPI through the AHB bus. Write 1 to clear bit.

0 (Val_0x0): SPI Error Response interrupt is disabled.

1 (Val_0x1): SPI Error Response interrupt is enabled.

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data